This topic is aimed at the study of 8-bit and 12-bit analog to digital converters and their interfacing with 8086. In most of the cases, the PIO 8255 is used for interfacing the analog to digital converters with a microprocessor. We have already studied 8255 interfacing with 8086 as an I/O port, in the previous section. This section will only emphasize the interfacing techniques of analog to digital converters with 8255.
The function of an A/D converter is to produce a digital word which represents the magnitude of some analog voltage or current. The specifications for an A/D converter are very similar to those for D/A converter. The resolution of an A/D converter refers to the number of bits in the output binary word. An 8-bit converter for example has a resolution of 1 part in 256. Accuracy and linearity specifications have the same meaning for an A/D converter as they do for a D/A converter. Another important specification for an ADC is its conversion time. This is simply the time it takes the converter to produce a valid output binary code for an applied input voltage. When we refer to a converter as high speed, we mean that it has a short conversion time.
The analog to digital converter is treated as an input device by the microprocessor that sends an initialising signal to the ADC to start the analog to digital data conversation process. The start of conversion signal is a pulse of a specific duration. The process of analog to digital conversion is a slow process, and the microprocessor has to wait for the digital data till the conversion is over. After the conversion is over, the ADC sends end of conversion (EOC) signal to inform the microprocessor that the conversion is over and the result is ready at the output buffer of the ADC. These tasks of issuing an SOC pulse to ADC, reading EOC signal from the ADC and reading the digital output of the ADC are carried out by the CPU using 8255 I/O ports.
The time taken by the ADC from the active edge of SOC pulse (the edge at which the conversion process actually starts) till the active edge of EOC signal is called as the conversion delay of the ADC. Or broadly speaking the time taken by the converter to calculate the equivalent digital data output from the instant of the start of conversion is called conversion delay. It may range any where from a few microseconds in case of fast ADCs to even a few hundred milliseconds in case of slow ADCs. A number of ADCs are available in the market, The selection of ADC for a particular application is done, keeping in mind the required speed, resolution range of operation, power supply requirements, sample and hold device requirements and the cost factors are considered.
The available ADCs in the market use different conversion techniques for the conversion of analog signals to digital signals. Parallel converter or flash converter, Successive approximation and dual slope integration techniques are the most popular techniques used in the integrated ADC chips. Whatever may be the technique used for conversion, a general algorithm for ADC interfacing contains the following steps.
1. Ensure the stability of analog input, applied to the ADC.
2. Issue start of conversion (SOC) pulse to ADC.
3. Read end of conversion (EOC) signal to mark the end of conversion process.
4. Read digital data output of the ADC as equivalent digital output.
It may be noted that analog input voltage must be constant at the input of the ADC right from the start of conversion till the end of conversion to get correct results. This may be ensured by a sample and hold circuit which samples the analog signal and holds it constant for a specified time duration. The microprocessor may issue a hold signal to the sample
and Hold circuit. If the applied input changes before the complete conversion process is over, the digital equivalent of the analog input calculated by the ADC may not be correct.
The analog to digital converter chips 0808 and 0809 are 8-bit CMOS, successive approximation converters. Successive approximation technique is one of the fast techniques for analog to digital conversion. The conversion delay is 100 µ s at a clock frequency of 640 kHz, which is quite low as compared to other converters. These converters do not need any external zero or full scale adjustments as they are already taken care of by internal circuits. These converters internally have a 3:8 analog multiplexer so that at a time eight different analog inputs can be connected to the chips. Out of these eight inputs only one can be selected for conversion by using address lines ADD A, ADD B and ADD C, as shown. Using these address inputs, multichannel data acquisition systems can be designed using a single ADC. The CPU may drive these lines using output port lines in case of multichannel applications. In case of single input applications, these may be hard wired to select the proper input.
only positive analog input voltages to their digital equivalents. These chips do not contain any internal sample and hold circuit. If one needs a sample and hold circuit for the conversion of fast, signals into equivalent digital quantities, it has to be externally connected at each of the analog inputs. Figure1 shows the block diagram and Figure 2 shows the pin diagram for ADC 08/0809.
Address lines for selecting analog inputs
Till now we have studied the necessary details of the analog to digital converter chips 0808/0809. Now we consider some interfacing examples of these chips with 8086 so that the working of these ADCs will be absolutely clear along with the required algorithms for interfacing.
Example: Interface ADC 0808 with 8086 using 8255 ports. Use Port A of 8255 for transferring digital data output of ADC to the CPU and Port C for control signals. Assume that an analog input is present at I/P2 of the ADC and a clock input of suitable frequency is available for ADC. Draw the schematic and write required ALP.
Figure 4 shows the interfacing connections of ADC0808 with 8086 using 8255.
The analog input I/P2 is used and therefore address pins A, B, C should be 0,1,0 respectively to select I/P2. The OE and ALE pins are already kept at +5V to select the ADC and enable the outputs. Port C upper acts as the input port to receive the EOC signal while port C lower acts as the output port to send SOC to the ADC.
Port A acts as a 8-bit input data port to receive the digital data output from the ADC. The 8255 control word is written as follows:
The digital to analog converters convert binary numbers into their analog equivalent voltages or currents. Several techniques are employed for digital to analog conversion.
i. Weighted resistor network
ii. R-2R ladder network
iii. Current output D/A converter
The DAC find applications in areas like digitally controlled gains, motor speed control, programmable gain amplifiers, digital voltmeters, panel meters, etc. D/A converter have many applications besides those where they are used with a microcomputer. In a compact disk audio player for example a 14-or16-bit D/A converter is used to convert the binary data read off the disk by a laser to an analog audio signal. Most speech synthesizer integrated circuits contain a D/A converter to convert stored binary data words into analog audio signals.
Characteristics
1. Resolution: It is a change in analog output for one LSB change in digital input. It is given by(1/2n )*Vref. If n=8 (i.e.8-bit DAC)
1/256*5V=39.06mV
2. Settling time: It is the time required for the DAC to settle for a full scale code change.
i. DAC0800 is a monolithic 8-bit DAC manufactured by National semiconductor.
ii. It has settling time around 100ms
iii. It can operate on a range of power supply voltage i.e. from 4.5V to
+18V. Usually the supply V+ is 5V or +12V. The V- pin can be kept at a minimum of -12V.
iv. Resolution of the DAC is 39.06mV
Interfacing of DAC0800 with 8086:
STEPPER MOTOR INTERFACING
A stepper motor is stepped from one position to the next by changing the currents through the fields in the motor. The two common field connections are referred to as two phase or four phase. There are three main areas of applications for stepper motor.
i. Instrumentation ii. Computer peripherals iii. Machine drives.
They are used in floppy drives, dot-matrix printers, X-Y plotters, digital watches etc to rotate things in steps of small angles. The step size in typical stepper motor varies from 0.9o to 30o.
Fig. 1. Internal Schematic of a Four Winding Stepper Motor
A stepper motor is a device used to obtain an accurate position control of rotating shafts. A stepper motor employs rotation of its shaft in terms of steps, rather than continuous rotation as in case of AC or DC motors. To rotate the shaft of the stepper motor, a sequence of pulses is needed to be applied to the windings of the stepper motor, in proper sequence. The number of pulses required for one complete rotation of the shaft of the stepper motor are equal to its number of internal teeth on its rotor. The stator teeth and the rotor teeth lock with each other to fix a position of the shaft. With a pulse applied to the winding input, the rotor rotates by one teeth position or an angle x. The angle x may be calculated as.
x =360° /no. of rotor teeth
After the rotation of the shaft through angle x the rotor locks itself with the next tooth in the sequence on the internal surface of stator. The internal schematic of a typical stepper motor with four windings is shown in Fig. 1.
The stepper motors have been designed to work with digital circuits. Binary level pulses of 0-5V are required at its winding inputs to obtain the rotation of shafts. The sequence of the pulses can be decided, depending upon the required motion of the shaft. Figure 1.1 shows a typical winding arrangement of the stepper motor. Figure 1.2 shows conceptual positioning of the rotor teeth on the surface of rotor, for a six teeth rotor.
A typical stepper motor may have parameters like torque 3 kg-em, operating voltage 12V, current rating 1.2A and a step angle 1.80, i.e. 200 steps/revolution (number of rotor teeth).
A simple scheme for rotating the shaft of a stepper motor is called as wave scheme. In this scheme, the windings Wa, Wb, We and Wd are applied with the required voltage pulses, in a cyclic fashion. By reversing the sequence of excitation, the direction of rotation of the stepper motor shaft may be reversed. Table 1 shows the excitation sequences for clockwise and anticlockwise rotations. Another popular scheme for rotation of a stepper motor shaft applies pulses to two successive windings at a time but these are shifted only by one position at a time. This scheme for rotation of stepper motor shaft is shown in Table 1.
Table 1 excitation Sequences of a Stepper Motor Using Wave Switching Scheme
PHA EQU 077H
PHB EQU 0BBH
PHC EQU 0DDH
PHD EQU 0EEH
DATA ENDS
CODE SEGMENT
ASSUME CS: CODE, DS: DATA
START: MOV AX, DATA
MOV DS, AX
MOV DX, CWR
MOV AL, 80H
OUT DX, AL
AGAIN: MOV AL, PHA
CALL STEP
MOV AL, PHB
CALL STEP
MOV AL, PHC
CALL STEP
MOV AL, PHD
CALL STEP
MOV BL, 0FFH
X: MOV CX, 0FFFFH
X1: LOOP X1
DEC BL
JNZ X
MOV AH, 0BH
INT 21H
OR AL, AL
JZ AGAIN
MOV AH, 4CH
INT 21H
STEP PROC NEAR
MOV DX, PORTC
OUT DX, AL
MOV BL, 60H
K1: MOV CX, 0FFFFH
K2: LOOP K2
DEC BL
JNZ K1
RET
STEP ENDP
CODE ENDS
END START