8051 microcontrollers

1- The MOS Technology 6501 microprocessor chip has 13 address lines. Spec­ify the memory registers it is capable of addressing. 2- If the Intel 8086 microprocessor has 20 address lines, what is its capacity of memory addressing? 3- Explain the functions of the accumulator. 4- List the Z80 programmable registers. 5- What is a flag? 6- What is the function of the program counter? 7- If the Z80 is executing the code fetched from the memory location 1845 H , what is the memory address in the program counter? 8- If the clock frequency is 4 MHz, how much time is required to execute an instruction of 21 T-states? 9- The instruction LD IX, (2050 H ) loads 2050 H into the index register. Specify the number of bytes. machine cycles, and T-states of this instruction by checking the instruction set. Calculate the time required to execute the in­struction if the system clock frequency is 6 MHz. 10- List the sequence of events that occurs when the Z80 reads from memory. 11- In t...

· The Z80 signals can be classified into six groups: address bus, data bus, con­trol signals, external requests, request acknowledge, and power and frequency signals (see section 1 for definitions of these signals). · The Z80 address bus has 16 unidirectional address lines; they are capable of addressing 64K memory. · The Z80 data bus has eight bidirectional data lines, and they are used for data transfer. · The Z80 microprocessor has six general-purpose 8-bit registers IB, C. D. E, H, and L) as a primary set. In addition, it includes the alternate set of these registers that can be used to exchange information with the primary set. The registers Band C, D and E, and Hand L can be combined to perform Some 16-bit operations. · The ALU section of the Z80 includes accumulator A and the flag register to indicate six different data conditions. It also includes the alternate accumula­tor A' and the flag register F', which can be used to exchange information with A and F, re...

The primary reasons to discuss other 8-bit microprocessors are to examine how the MPU model developed in the last topic matches with various microproces­sors and to confirm that the underlying basic concepts remain similar even though specific details may vary from one chip to another. At present. many 8-bit general-­purpose microprocessors are available in the market. We will focus on three: the Intel 8085. the National Semiconductor NSC 800, and the Motorola 6800. These microprocessors are selected to illustrate various strategies used in designing the microprocessor. The recent trend in 8-bit microprocessors can be illustrated by so-called 8-bit super chips, such as the Hitachi HD64180, discussed in Topic 18. Inte18085 The intel 8085 and its predecessor the 8080 are widely used 8-bit microprocessors. The 8080 MPU is composed of three chips-the 8080 microprocessor, the clock generator, and the system driver-and it needs three power supplies ( + 5 V, - 5 V. + 12 V). The 8085 is an...

After reading the previous sections. the reader may have many unanswered ques­tions. One of the primary reasons for this predicament is that the microprocessor is a programmable and complex device. It interacts with external devices such as memory and I/Os. and some questions cannot be answered until we discuss these other devices. Similarly. some questions will remain unanswered until we start using instructions and writing programs. However. there are some questions that we should answer immediately.  1. How does the Z80 microprocessor know where to begin after the power is turned on? Most microcomputer systems have built-in power-on reset circuits , meaning that when the power is turned on, the microprocessor is reset and its program counter is cleared to the address 0000 H , address 0000 H is placed on the address bus and the instruction stored at that location determines what happens next. 2. How does the Z80 know what operation to perform first (Memory Read/Writ...

After examining the concepts summarized at the end of the previous section, we may need to generate additional control signals. 1. To read from memory, the M͞R͞E͞Q and the R͞D signals are necessary, and to read from an input device, the I͞O͞R͞Q and the R͞D are necessary; all these sig­nals are active low. As a design practice, the M͞R͞E͞Q is generally combined with a decoded address (discussed in Topic4). and R͞D is connected directly to the memory chip. However, control signals R͞D and W͞R can also be com­bined with M͞R͞E͞Q and I͞O͞R͞Q to generate additional signals. We can generate active low Memory Read (M͞E͞M͞R͞D) signal either by ANDing these signals in a negative NAND gate as shown in Figure 7(a) or by using a 2-to-4 decoder as shown in Figure 7(b). The decoder is enabled by the M͞R͞E͞Q and has R͞D and W͞R signals as input. Both inputs cannot be active at the same time; when one is low, the other will remain high, When R͞D is active low, the input is 0 1 , and the output O 1 g...

MACHINE CYCLES AND BUS TIMINGS The Z80 microprocessor is designed to execute 158 different instruction types. Each instruction has two parts: operation code (known as opcode) and operand. The opcode is a command such as Add, and the operand IS an object to be oper­ated on, such as a byte or the contents of a register. Some instructions are 1-byte instructions. and some are multibyte instructions. To execute an instruction, the Z80 needs to perform various operations such as Memory Read/Write and I/O Read/Write. However, there is no direct relationship between the number of bytes of an instruction and the number of operations the Z80 has to perform. For ex­ample, the instruction to send the contents of the accumulator to the output port 10 H ,is a 2-byte instruction: OUT (10H), A. Byte 1: OUT → This is the opcode to output data. Byte 2: (10H*) , A → This is the operand to specify that the byte should be sent from the accumulator to port 10 H . (A hexadecim...

Z80 Microprocessor Architecture The Z80 is one of the most versatile and widely used 8-bit microprocessors, and many micro­processor-based systems are designed around the Z80. The Z80 chip includes most of the logic circuitry for performing computing tasks and necessary bus signals. This topic discusses the Z80 architecture in terms of the generalized MPU discussed in the previous topic . This topic describes the Z80 hardware model; it shows logic pinout of the chip and classifies the signals in various groups accord­ing to their functions. Similarly, the topic in­cludes a brief description of programming reg­isters and flags. The hardware model lists the operations the Z80 frequently performs and describes how the Z80 communicates with mem­ory and I/Os by using various buses. These op­erations are illustrated in terms of machine cycles and logic levels of the buses in relation to the system clock. Finally, the topic includes the discus­sion of similar 8-bit microprocessors in te...