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INPUT AND OUTPUT (1/0) DEVICES

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INPUT AND OUTPUT (1/0) DEVICES Input/Output devices are the means through which the MPU communicates with "the outside world." The MPU accepts binary data as input from devices such as keyboards and analog-to-digital (A/D) converters and sends data to output devices such as LEDs or printers. There are two different methods b which an MPU can identify I/O devices :one uses an 8-bit address and the other a 16- bit address These methods are described briefly in the following sections. I/Os with 8-Bit Addresses (Peripheral-Mapped I/O) In this type of I/O, the MPU uses eight address lines to identify an input or an output device; this is also known as peripheral-mapped I/O .The eight address lines can have 256 (28 combinations) a dresses ;thus the MPU can identify 256 input devices and 256 output devices with addresses ranging from 00 H to FF H · The input and output devices are differentiated by the control signals I/O Read for input devices and I/O Write for output device...
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8086 I/O Ports , Important Points To Be Considered for 8086 Interface to Memory and I/O and 8086-Based Microcomputer

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9.9.3 8086 I/O Ports Devices with 8-bit I/O ports can be connected to either the upper or the lower half of the data bus. If the I/O port chip is connected to the lower half of the 8086 data lines (AD0- AD7), the port addresses will be even (A 0 = 0). On the other hand, the port addresses will be odd (A0 = 1) if the I/O port chip is connected to the upper half of the 8086 data lines (AD8-AD 15 ). A0 will always be 1 or 0 for the partitioned I/O chip. Therefore, A 0 cannot be used as an address input to select registers within a particular I/O chip. If two chips are connected to the lower and upper halves of the 8086 address bus that differ only in A0 (consecutive odd and even addresses), A0 and BH E must be used as conditions of chip select decoding to avoid a write to one I/O chip from erroneously performing a write to the other. The 8086 uses either standard I/O or memory-mapped I/O. The standard I/O uses the instructions IN and OUT, and is able to provide up to 64K bytes of I/...
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PUSH and POP Opcodes

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PUSH and POP Opcodes The PUSH and POP opcodes specify the direct address of the data. The data moves between an area of internal RAM, known as the stack, and the specified direct address. The stack pointer special-function register (SP) contains the address in RAM where data from the source address will be PUSHed, or where data to be POPed to the destination address is found. The SP register actually is used in the indirect addressing mode but is not named in the mnemonic. It is implied that the SP holds the indirect address when­ever PUSHing or POPing. Figure 3.3 shows the operation of the stack pointer as data is PUSHed or POPed to the stack area in internal RAM. A PUSH opcode copies data from the source address to the stack. SP is incremented by one before the data is copied to the internal RAM location contained in SP so that the data is stored from low addresses to high addresses in the internal RAM. The stack grows up in memory as it is PUSHed. Excessive PUSHing can make the ...
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