LIST OF SELECTED Z80 INSTRUCTIONS par 2

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Most instructions are compatible with the 8080 instruction set, with a few exceptions. Notations used in the description of the instructions include

r = Z80 8-bit Register

rp = Register Pair

rs = Register Source

rx = Index Registers

rd = Register Destination

d= Displacement Byte

m = Memory

b = Bit

( ) = contents of l6-bit Memory Address or 8-bit I/O Address

1. Data Copy (Load) Instructions

Mnemonics

Bytes

Tasks

Data (8 bits and 16 bits) copy or load in registers

LD rd, rs

1

Copy data from source register rs into destina­tion register rd.

LD r, 8-bit

2

Load 8-bit into a register.

LD rp, 16-bit

3

Load 16-bit into register pair.

LD rx, 16-bit

4

Load 16-bit data into index register.

Data copy between registers and memory

LD A, (I6-bit)

3

Load accumulator from memory; the address is specified by 16-bit operand.

LD (I6-bit), A

3

Load memory from accumulator; the memory address is specified by 16-bit operand.

LD A, (rp)

1

Load accumulator from memory; the memory address is specified by the contents of register pair.

LD A, (rp)

1

Load memory from accumulator; the memory address is given by the contents of register pair.

LD (rp), A

1

Load register from memory; the address is specified by 16-bit contents in HL.

LD r, (HL)

1

Load memory from register; the address is specified by 16-bit contents in HL.

LD (HL), r

3

Copy memory contents into register r; the memory address is obtained by adding the contents of index register and the displace­ment byte d.

LD r,(rx + d)

3

Copy register contents into memory address shown by index register and the displacement (rx + d).

2. Arithmetic Instructions·

ADD A, r

1

Add register contents to accumulator.

ADD A, 8-bit

2

Add 8-bit data to accumulator.

ADD A, (HL)

1

Add memory contents to accumulator; the memory address is specified by the contents in HL.

SUB r

1

Subtract contents of register from accumulator.

SUB 8-bit

2

Subtract 8-bit data from accumulator.

SUB (HL)

1

Subtract memory contents from accumulator; the memory address is specified by the con­tents of HL.

INC r

1

Increment the contents of a register,

INC (HL)

1

Increment the contents of memory; the mem­ory address is specified by the contents of HL.

INC rp

1

Increment 16-bit contents in a register pair.

DEC r

1

Decrement the contents of a register.

DEC (HL)

1

Decrement the contents of memory; the mem­ory address is specified by the contents of HL.

DEC rp

1

Decrement 16-bit contents in a register pair.

3. Logic Instructions*

AND r

1

Logically AND the contents of a register with the accumulator.

AND 8-bit

2

Logically AND 8-bit data with accumulator.

AND (HL)

1

Logically AND the contents of memory with accumulator; the memory address is specified by the contents of HL.

CP r

1

Compare the contents of register with accumulator for Jess than, equal to, or greater than.

CP 8-bit

1

Compare 8-bit data with accumulator for less than, equal to, or greater than.

CP (HL)

1

Compare the contents of memory with accumulator for less than, equal to, or greater than; the memory address is specified by the con­tents of HL.

4. Bit Rotation

RLCA

1

Rotate each bit in the accumulator to the left position.

RLA

1

Rotate each bit in the accumulator including the carry C to the left position.

RRCA

1

Rotate each bit in the accumulator to the right position.

RRA

1

Rotate each bit in the accumulator including the carry C to the right position.

5. Branch Instructions

JP 16-bit

3

Change the program sequence (Jump) to mem­ory location specified by the l6-bit address.

JP Z, l6-bit

3

Change the program sequence (Jump) to mem­ory location specified by the l6-bit address if 'the Zero (Z) flag is set.

JP NZ, l6-bit

3

Change the program sequence (Jump) to mem­ory location specified by the l6-bit address if the Zero (Z) flag is reset.

JP C, l6-bit

3

Change the program sequence (Jump) to mem­ory location specified by the l6-bit address if the Carry (C) flag is set.

JP NC, l6-bit

3

Change the program sequence (Jump) to mem­ory location specified by the l6-bit address if the Carry (C) flag is reset.

CALL l6-bit

3

Change the program sequence to the location of the subroutine.

RET

1

Return to the calling program after completing the subroutine sequence.

6. Machine Control Instructions

HALT

1

Suspend execution and wait.

NOP

1

Do not perform any operation.

7. Bit Rotation*

RLC r

2

Rotate each bit in register r to the left.

RL r

2

Rotate each bit in register r to the left, includ­ing Carry flag.

SLA r

2

Shift each bit in register r to the left.

8. Bit Manipulation

BIT b, r

2

Test bit b in register r, affecting the Z flag.

SET b, r

2

Set bit b in register r. ("b" represents bit posi­tion 0 to 7)

RES b, r

2

Reset bit b in register r.

9. Z80 Special (Conditional) Repetitive Instructions. The Z80 instruction set in cludes several instructions that are automatically repeated until a specified register becomes zero. These instructions are quite efficient in dealing with block transfer or counter applications. Some of these instructions are as follows:

CPDR

2

Compare memory contents specified by HL with the accumulator. Increment HL decre­ment BC, and repeat until BC =0, or A = contents of memory specified by HL.

DJNZ d

2

Decrement B, and if B ≠ 0, jump to memory address obtained by adding displacement byte to the program counter.

INDR

2

Read input port indicated by the C register, and store the byte in memory specified by HL register. Decrement B and HL, and continue until B = 0.

OTDR

2

Output the contents of memory specified by HL to port indicated by the C register. Decre­ment Band HL, and continue until B = 0.

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